Bài giảng Vi xử lý - Chương 3: Họ vi điều khiển 8051 - Bùi Minh Thành

Nội dung

3.1 Giới thiệu họ vi điều khiển 8051

3.2 Kiến trúc phần cứng 8051

3.3 Các phương pháp định địa chỉ

 8051 là vi điều khiển đầu tiên của họ vi điều khiển

MCS51 được Intel sản xuất vào năm 1980. Họ MCS51

là họ 8-bit có khả năng định địa chỉ 64KB bộ nhớ

chương trình và 64KB bộ nhớ dữ liệu

 

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ta 
memory
1231
32
30
8051 Internal data memory
71
Instruction Operation 
MOV @R1, A Copy the data in A to the address pointed to by 
the contents of R1 
MOV A, @R0 Copy the contents of the address pointed to by 
register R0 to the A register 
MOV @R1, #35h Copy the number 35h to the address pointed to 
Examples of Indirect Addressing
by register R1 
MOV @R0, 80h or 
MOV @R0, P0 
Copy the contents of the port 0 pins to the 
address pointed to by register R0. 
MOVX A, @R0 Copy the contents of the external data address 
pointed to by register R0 to the A register 
MOVX A, @DPTR Copy the contents of the external data address 
pointed to by register DPTR to the A register 
MOV @Ri,#data where i = 0 or 1
72
Write a program segment to copy the 
value 55h into RAM memory locations 
40h to 44h using:
(a) Direct addressing mode;
Example
(b) register indirect addressing mode 
without a loop; and
(c) with a loop
73
MOV A, #55h ; load A with value 55h
MOV 40h, A ; copy A to RAM location 40h
MOV 41h, A ; copy A to RAM location 41h
Solution to Example (a)
Direct addressing mode
MOV 42h, A ; copy A to RAM location 42h
MOV 43h, A ; copy A to RAM location 43h
MOV 44h, A ; copy A to RAM location 44h
74
MOV A, #55h ; load A with value 55h
MOV R0, #40h ; load the pointer. R0 = 40h
MOV @R0, A ; copy A to RAM location R0 points to
INC R0 ; increment pointer. Now R0 = 41h
MOV @R0, A ; copy A to RAM location R0 points to
Solution to Example (b)
register indirect addressing mode without a loop
INC R0 ; increment pointer. Now R0 = 42h
MOV @R0, A ; copy A to RAM location R0 points to
INC R0 ; increment pointer. Now R0 = 43h 
MOV @R0, A ; copy A to RAM location R0 points to
INC R0 ; increment pointer. Now R0 = 44h
MOV @R0, A ; copy A to RAM location R0 points to
75
MOV A, #55h ; A = 55h
MOV R0, #40h ; load pointer. R0 = 40h, RAM add.
MOV R2, #05 ; load counter, R2 = 5
AGAIN: 
MOV @R0, A ; copy 55A to RAM location R0 points to
INC R0 ; increment R0 pointer
Solution to Example (c) Loop method
DJNZ R2, AGAIN ; loop until counter = zero 
“DJNZ” : decrement and jump if Not Zero
DJNZ direct, relative
DJNZ Rn, relative where n = 0,1,,,7
MOV R2, #05h ; example
LP: 
;--------------------------------
; do 5 times inside the loop
;--------------------------------
DJNZ R2, LP ; R2 as counter
76
Example (looping)
Write a program segment to clear 15 RAM 
locations starting at RAM address 60h.
CLR A ; A = 0
MOV R1, #60h ; load pointer. R1 = 60h
MOV R7, #15 ; load counter, R7 = 15 (0F in HEX)
AGAIN: MOV @R1, A ; clear RAM location R1 points to
INC R1 ; increment R1 pointer
DJNZ R7, AGAIN ; loop until counter = zero 
; clear one ram location at address 60h
CLR A
MOV R1,#60h
MOV @R1,A
Setup a loop using DJNZ and register R7 as counter
77
Example (block transfer)
Write a program segment to copy a block of 10 bytes of 
data from RAM locations starting at 35h to RAM 
locations starting at 60h.
MOV R0, #35h ; source pointer
MOV R1, #60h ; destination pointer
MOV R3, #10 ; counter
BACK:
MOV A, @R0 ; get a byte from source
MOV @R1, A ; copy it to destination
INC R0 ; increment source pointer
INC R1 ; increment destination pointer
DJNZ R3, BACK ; keep doing it for all ten bytes
78
Using pointer in the program enables handling 
dynamic data structures an advantage
Dynamic data: the data value is not fixed
In this mode, we can defer the calculation of the 
address of data and the determination of the amount 
of memory to allocate at (program) runtime (eg. 
Notes of Indirect Addressing
MOV A, @R0)
Register or direct addressing (eg. MOV A, 30H) cannot be used ,
since they require operand addresses to be known at assemble-time.
79
Addressing Modes
5) Register Indexed Mode – source or 
destination address is the sum of the base 
address and the accumulator (Index)
• Base address can be DPTR or PC
mov dptr, #4000h
mov a, #5
movc a, @a + dptr ;a  M[4005]
80
Addressing Modes
5) Register Indexed Mode continue
• Base address can be DPTR or PC
ORG 1000h
1000 mov a, #5
1002 movc a, @a + PC ;a  M[1008]
1003 Nop
• Lookup Table 
• MOVC only can read internal code memory
PC
81
Using a base register (starting point) and an 
offset (how much to parse through) to form 
the effective address for a JMP or MOVC
instruction
Indexed Addressing
MOVC A, @A+DPTR
MOVC A, @A+PC
JMP @A+DPTR
Used to parse through an array of items or a 
look-up table
Usually, the DPTR is the base register and the 
“A” is the offset
A increases/decreases to parse through the 
list
82
Program 
memory
ACC
DPTR
00 10
ACC
56⊕
Indexed Addressing Example: MOVC A,@A+DPTR
AfterBefore
MOVC A, @A + DPTR2000
2001
41 3156
83
Instruction Operation 
MOVC A, @A + DPTR Copy the code byte, found at the ROM 
address formed by adding register A and the 
DPTR register, to A 
MOVC A, @A + PC Copy the code byte, found at the ROM 
Examples of Indexed Addressing
address formed by adding A and the PC, to A 
JMP @A + DPTR Jump to the address formed by adding A to 
the DPTR, this is an unconditional jump and 
will always be done. 
84
Example (look-up table)
Write a program to get the x value from P1 and 
send x2 to P2, continuously.
ORG 0
MOV DPTR, #300h ; load look-up table address
MOV A, #0FFh ; A = FF
MOV P1, A ; configure P1 as input port
BACK: MOV A, P1 ; get X
MOV A, @A+DPTR ; get X square from table
MOV P2, A ; issue it to P2
SJMP BACK ; keep doing it
ORG 300h
TABLE:DB 0, 1, 4, 9, 16, 25, 36, 49, 64, 81
END 
85
Review Questions
1. The instruction “MOV A, 40h” uses ________ 
addressing mode. Why?
2. What address is assigned to register R2 of bank 0?
3. What address is assigned to register R2 of bank 2?
4. What address is assigned to register A?
5. Which registers are allowed to be used for register 
indirect addressing mode if the data is in on-chip 
RAM?
86
Access to Accumulator
• A register can be accessed by direct and register
mode
• This 3 instruction has same function with different
code
0703 E500 mov a,00h
0705 8500E0 mov acc,00h
0708 8500E0 mov 0e0h,00h
• Also this 3 instruction 
070B E9 mov a,r1
070C 89E0 mov acc,r1
070E 89E0 mov 0e0h,r1 87
Access to SFRs
• B – always direct mode - except in MUL & DIV
0703 8500F0 mov b,00h
0706 8500F0 mov 0f0h,00h
0709 8CF0 mov b,r4
070B 8CF0 mov 0f0h,r4
• P0~P3 – are direct address 
0704 F580 mov p0,a
0706 F580 mov 80h,a 
0708 859080 mov p0,p1
• Also other SFRs (pcon, tmod, psw,.)
88
SFRs Address
All SFRs such as
(ACC, B, PCON, TMOD, PSW, P0~P3, ) 
are accessible by name and direct 
address
But
both of them 
Must be coded as direct address
89
8051 Instruction Format
• 6) relative addressing
here: sjmp here ;machine code=80FE(FE=-2)
Range = (-128 ~ 127)
• 7) Absolute addressing (limited in 2k current mem block)
Op code Relative address
A10-
A8 Op code
0700 1 org 0700h
0700 E106 2 ajmp next ;next=706h
0702 00 3 nop
0703 00 4 nop
0704 00 5 nop
0705 00 6 nop
7 next:
8 end
A7-A0 07FEh
90
Tính toán offset với định địa chỉ tương đối
91
Used in jump (“JMP”) instructions
Relative address: an 8-bit value (-128 to 
+127)
Relative Addressing SJMP relative
DJNZ direct, relative
DJNZ Rn, relative, where n=0,1,,,7
You may treat relative address as an 
offset
Labels indicate the JMP destinations (i.e. 
where to stop)
Assembler finds out the relative address 
using the label
92
The relative address is added to the PC
The sum is the address of the next 
instruction to be executed
Relative Addressing
As a result, program skips to the desired 
line right away instead of going through 
each line one by one
Labels indicate the JMP destinations (i.e. 
where to stop).
93
Branch Opcode
Offset
Next Opcode
Program Counter
Relative Addressing
Program counter + offset 
= Effective address 
= address of next instruction
+ Offset
Next Instruction
94
Instruction Operation 
SJMP NXT Jump to relative address with the label 'NXT'; this 
is an unconditional jump and is always taken. 
DJNZ R1, DWN Decrement register R1 by 1 and jump to the 
relative address specified by the label 'DWN' if 
Examples of Relative Addressing
the result of R1 is not zero. 
0035
95
Only used with the instructions ACALL and 
AJMP
Similar to indexed addressing mode
The largest “jump” that can be made is 2K
Absolute Addressing ACALL address11
AJMP address11
211 = 2048=2K
The subroutine called must therefore start within the 
same 2K Block of the program memory as the first 
byte of the instruction following ACALL.
96
Absolute Addressing
ACALL address11
AJMP address11ORG 00H ; reset location
LJMP START ; 3 bytes instruction
ORG 3FFEH
START: ACALL FORWARD ; 2 bytes instruction
; now code address at 4000H
LJMP TEST
ORG 47FFH ; 010001111111111B
FORWARD: 
RET
ORG 5800H ; 0101100000000000B
BACKWARD:
RET
ORG 5FFDH
TEST: ACALL BACKWARD ; 2 bytes instruction
; now code address at 5FFFH
SJMP $
END
97
8051 Instruction Format
• Long distance address
• Range = (0000h ~ FFFFh)
0700 1 org 0700h
Op code A15-A8 A7-A0
0700 020707 2 ajmp next ;next=0707h
0703 00 3 nop
0704 00 4 nop
0705 00 5 nop
0706 00 6 nop
7 next:
8 end
98
Bài tập 1
Cho biết mã máy và các cách định địa chỉ 
của các lệnh sau:
1. MOVX @DPTR, A
2. SETB P3.1
3. ADD A, R3
4. MOV A, #0FBH
5. MOV A, @R1
6. MOV 41H, A
99
Bài tập 2
1. Viết các lệnh thực hiện cất giá trị FFH 
vào RAM dữ liệu bên ngoài ở địa chỉ 
19A3H.
2. Sau đoạn chương trình này, cho biết các 
địa chỉ bit có nội dung là 1:
a) MOV 25h, #13h 
b) MOV R0, #22h 
c) MOV @R0, 25h
100
Bài tập 3
1. Cho biết mã máy sau biểu diễn lệnh/tác vụ gì?
75H, 8AH, E7H
2. Giả sử lệnh
AJMP LABEL
trong bộ nhớ mã ở địa chỉ 1600H và 1601H, 
và nhãn LABEL ứng với lệnh ở địa chỉ 1723H
a) Cho biết mã máy của lệnh này?
b) Lệnh này có hợp lệ không khi LABEL ứng với lệnh 
ở địa chỉ 1A23H? Giải thích 
101

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