Bài giảng Vi xử lý - Chương 3: Vi điều khiển. Họ vi điều khiển 8051

Họ vi điều khiển Microchip

12-bit instruction PIC (Programmable Interface Controller)

14-bit instruction PIC

16-bit instruction PIC

17-bit instruction PIC

18-bit, 24 bit, 32 bit, dsPIC

 

ppt113 trang | Chuyên mục: Vi Xử Lý – Vi Điều Khiển | Chia sẻ: tuando | Lượt xem: 494 | Lượt tải: 0download
Tóm tắt nội dung Bài giảng Vi xử lý - Chương 3: Vi điều khiển. Họ vi điều khiển 8051, để xem tài liệu hoàn chỉnh bạn click vào nút "TẢI VỀ" ở trên
 EA mov a,r2 ;EA = 1110 10100710 ED mov a,r5 ;ED = 1110 11010711 EF mov a,r7 ;Ef = 1110 11110712 2F add a,r70713 F8 mov r0,a0714 F9 mov r1,a0715 FA mov r2,a0716 FD mov r5,a0717 FD mov r5,a The most efficient addressing mode:No need to do memory access Instructions are much shorter Result: speed (hence efficiency) increasedWe can move data between Acc and Rn (n = 0 to 7) but movement of data between Rn registers is not allowed	e.g. MOV R4, R7 (Invalid)Notes of Register Addressing;Use the following :MOV A, R7MOV R4,AMOV R4,07H ; this is direct addressing mode Review QuestionsCan the programmer of a microcontroller make up new addressing modes?Show the instruction to load 1000 0000 (binary) into R3.Why is the following invalid? “MOV R2, DPTR”True or false. DPTR is a 16-bit register that is also accessible in low-byte and high-byte formats.Is the PC (program counter) also available in low-byte and high-byte formats?Addressing ModesRegister Indirect – the address of the source or destination is specified in registersUses registers R0 or R1 for 8-bit address:mov psw, #0	; use register bank 0mov r0, #3Ch	mov @r0, #3	; M[3Ch]  3Uses DPTR register for 16-bit addresses:mov dptr, #9000h	; dptr  9000hmovx a, @dptr	; a  M[9000h]Note that 9000h is an address in external memory8051 Instruction FormatOp codeiRegister indirect addressingmov a, @Ri ; i = 0 or 1070D E7 mov a,@r1070D 93 movc a,@a+dptr070E 83 movc a,@a+pc070F E0 movx a,@dptr0710 F0 movx @dptr,a0711 F2 movx @r0,a0712 E3 movx a,@r1 Use Register Indirect to access upper RAM block (+8052)Use a register to hold the address of the operand; i.e. using a register as a pointerOnly R0 and R1 can be used when data is inside the CPU (address ranges from 00h – 7Fh) eg. MOV A, @R1 R0 ,R1 and DPTR can be used when addressing external memory locations eg. MOVX A,@R1 MOVX A,@DPTRMust put a “@” sign before the register nameRegister Indirect AddressingAfterProgram memoryBeforeAddressesACCR0ADD A, @R0200201Data memory123132301031ACCR03122Register Indirect Addressing (eg. ADD A,@R0)8051 Internal data memoryExamples of Indirect AddressingMOV @Ri,#data where i = 0 or 1Write a program segment to copy the value 55h into RAM memory locations 40h to 44h using:	Direct addressing mode;	register indirect addressing mode without a loop; and	with a loopExample MOV A, #55h	; load A with value 55h MOV 40h, A	; copy A to RAM location 40h MOV 41h, A	; copy A to RAM location 41h MOV 42h, A	; copy A to RAM location 42h MOV 43h, A	; copy A to RAM location 43h MOV 44h, A	; copy A to RAM location 44hSolution to Example (a)Direct addressing mode MOV A, #55h	; load A with value 55h MOV R0, #40h	; load the pointer. R0 = 40h MOV @R0, A	; copy A to RAM location R0 points to INC R0	; increment pointer. Now R0 = 41h MOV @R0, A	; copy A to RAM location R0 points to INC R0	; increment pointer. Now R0 = 42h MOV @R0, A	; copy A to RAM location R0 points to INC R0	; increment pointer. Now R0 = 43h MOV @R0, A	; copy A to RAM location R0 points to INC R0	; increment pointer. Now R0 = 44h MOV @R0, A	; copy A to RAM location R0 points toSolution to Example (b)register indirect addressing mode without a loop 	MOV A, #55h	; A = 55h 	MOV R0, #40h	; load pointer. R0 = 40h, RAM add. 	MOV R2, #05	; load counter, R2 = 5AGAIN: 	 MOV @R0, A	; copy 55A to RAM location R0 points to 	INC R0	; increment R0 pointer 	DJNZ R2, AGAIN	; loop until counter = zero 	Solution to Example (c)“DJNZ” : decrement and jump if Not ZeroDJNZ direct, relativeDJNZ Rn, relative where n = 0,1,,,7Loop method MOV R2, #05h ; exampleLP: ;-------------------------------- ; do 5 times inside the loop ;-------------------------------- DJNZ R2, LP ; R2 as counter Example (looping)Write a program segment to clear 15 RAM locations starting at RAM address 60h. 	CLR A	; A = 0 	MOV R1, #60h	; load pointer. R1 = 60h 	MOV R7, #15	; load counter, R7 = 15 (0F in HEX)AGAIN: 	MOV @R1, A	; clear RAM location R1 points to 	INC R1	; increment R1 pointer 	DJNZ R7, AGAIN	; loop until counter = zero 	; clear one ram location at address 60hCLR AMOV R1,#60hMOV @R1,ASetup a loop using DJNZ and register R7 as counterExample (block transfer)Write a program segment to copy a block of 10 bytes of data from RAM locations starting at 35h to RAM locations starting at 60h. 	MOV R0, #35h	; source pointer 	MOV R1, #60h	; destination pointer 	MOV R3, #10	; counterBACK: 	 MOV A, @R0	; get a byte from source	MOV @R1, A	; copy it to destination	INC R0	; increment source pointer 	INC R1	; increment destination pointer 	DJNZ R3, BACK	; keep doing it for all ten bytes 	Using pointer in the program enables handling dynamic data structures an advantageDynamic data: the data value is not fixedIn this mode, we can defer the calculation of the address of data and the determination of the amount of memory to allocate at (program) runtime (eg. MOV A, @R0)Notes of Indirect AddressingRegister or direct addressing (eg. MOV A, 30H) cannot be used ,since they require operand addresses to be known at assemble-time.Addressing ModesRegister Indexed Mode – source or destination address is the sum of the base address and the accumulator(Index)Base address can be DPTR or PCmov dptr, #4000hmov a, #5movc a, @a + dptr ;a  M[4005]Addressing ModesRegister Indexed Mode continueBase address can be DPTR or PC 	ORG 1000h1000 mov a, #5 movc a, @a + PC ;a  M[1008] NopLookup Table MOVC only can read internal code memoryPCUsing a base register (starting point) and an offset (how much to parse through) to form the effective address for a JMP or MOVC instructionUsed to parse through an array of items or a look-up tableUsually, the DPTR is the base register and the “A” is the offsetA increases/decreases to parse through the listIndexed AddressingMOVC A, @A+DPTRMOVC A, @A+PCJMP @A+DPTRAfterProgram memoryBeforeACCDPTRMOVC A, @A + DPTR2000200141001031ACC5656Indexed AddressingMOVC A, @A + DPTRExample: MOVC A,@A+DPTRExamples of Indexed AddressingExample (look-up table)Write a program to get the x value from P1 and send x2 to P2, continuously. 	ORG 0	MOV DPTR, #300h	; load look-up table address 	MOV A, #0FFh	; A = FF 	MOV P1, A	; configure P1 as input portBACK: 	MOV A, P1	; get X	MOV A, @A+DPTR	; get X square from table	MOV P2, A	; issue it to P2 	SJMP BACK	; keep doing it	ORG 300h TABLE:	DB 0, 1, 4, 9, 16, 25, 36, 49, 64, 81	END 	Review QuestionsThe instruction “MOV A, 40h” uses ________ addressing mode. Why?What address is assigned to register R2 of bank 0?What address is assigned to register R2 of bank 2?What address is assigned to register A?Which registers are allowed to be used for register indirect addressing mode if the data is in on-chip RAM?Access to AccumulatorA register can be accessed by direct and register modeThis 3 instruction has same function with different code0703 E500 mov a,00h0705 8500E0 mov acc,00h0708 8500E0 mov 0e0h,00hAlso this 3 instruction 070B E9 mov a,r1070C 89E0 mov acc,r1070E 89E0 mov 0e0h,r1Access to SFRsB – always direct mode - except in MUL & DIV0703 8500F0 mov b,00h0706 8500F0 mov 0f0h,00h 0709 8CF0 mov b,r4070B 8CF0 mov 0f0h,r4P0~P3 – are direct address 0704 F580 mov p0,a0706 F580 mov 80h,a 0708 859080 mov p0,p1Also other SFRs (pcon, tmod, psw,.)SFRs AddressAll SFRs such as(ACC, B, PCON, TMOD, PSW, P0~P3, ) are accessible by name and direct addressBut both of them Must be coded as direct address8051 Instruction FormatA10-A8Op coderelative addressinghere: sjmp here ;machine code=80FE(FE=-2)Range = (-128 ~ 127)Absolute addressing (limited in 2k current mem block)0700 1 org 0700h0700 E106 2 ajmp next ;next=706h0702 00 3 nop0703 00 4 nop0704 00 5 nop0705 00 6 nop 7 next: 8 endOp codeRelative addressA7-A007FEhTính toán offset với định địa chỉ tương đốiUsed in jump (“JMP”) instructionsRelative address: an 8-bit value (-128 to +127)You may treat relative address as an offsetLabels indicate the JMP destinations (i.e. where to stop)Assembler finds out the relative address using the labelRelative AddressingSJMP relativeDJNZ direct, relativeDJNZ Rn, relative, where n=0,1,,,7The relative address is added to the PCThe sum is the address of the next instruction to be executedAs a result, program skips to the desired line right away instead of going through each line one by oneLabels indicate the JMP destinations (i.e. where to stop).Relative AddressingProgram counter + offset = Effective address = address of next instruction+ OffsetBranch OpcodeOffsetNext OpcodeNext InstructionProgram CounterRelative AddressingExamples of Relative Addressing0035Only used with the instructions ACALL and AJMPSimilar to indexed addressing modeThe largest “jump” that can be made is 2KAbsolute AddressingACALL address11AJMP address11211 = 2048=2KThe subroutine called must therefore start within the same 2K Block of the program memory as the first byte of the instruction following ACALL.Absolute AddressingACALL address11AJMP address11	ORG	00H	; reset location	LJMP	START	; 3 bytes instruction	ORG	3FFEHSTART:	ACALL FORWARD ; 2 bytes instruction; now code address at 4000H	LJMP	TEST	ORG	47FFH	; 010001111111111B FORWARD: RET	ORG	5800H	; 0101100000000000BBACKWARD:	RET	ORG	5FFDHTEST:	ACALL	BACKWARD	; 2 bytes instruction; now code address at 5FFFH SJMP	$	END8051 Instruction FormatLong distance addressRange = (0000h ~ FFFFh)0700 1 org 0700h0700 020707 2 ajmp next ;next=0707h0703 00 3 nop0704 00 4 nop0705 00 5 nop0706 00 6 nop 7 next: 8 endOp codeA15-A8A7-A0BT 1Cho biết mã máy và các cách định địa chỉ của các lệnh sau:MOVX @DPTR, ASETB P3.1ADD A, R3MOV A, #0FBHMOV A, @R1MOV 41H, ABT 2Viết các lệnh thực hiện cất giá trị FFH vào RAM dữ liệu bên ngoài ở địa chỉ 19A3H.Sau đoạn chương trình này, cho biết các địa chỉ bit có nội dung là 1:MOV 25h, #13h MOV R0, #22h MOV @R0, 25hBT 3Cho biết mã máy sau biểu diễn lệnh/tác vụ gì?	75H, 8AH, E7HGiả sử lệnh	AJMP LABEL	trong bộ nhớ mã ở địa chỉ 1600H và 1601H, và nhãn LABEL ứng với lệnh ở địa chỉ 1723HCho biết mã máy của lệnh này?Lệnh này có hợp lệ không khi LABEL ứng với lệnh ở địa chỉ 1A23H? Giải thích 

File đính kèm:

  • pptbai_giang_vi_xu_ly_chuong_3_vi_dieu_khien_ho_vi_dieu_khien_8.ppt